By Hans Camenzind
A finished creation to CMOS and bipolar analog IC layout. The publication presumes no previous wisdom of linear layout, making it understandable to engineers with a non-analog back-ground. The emphasis is on sensible layout, masking the full box with hundreds of thousands of examples to provide an explanation for the alternatives. techniques are offered following the background in their discovery. content material: 1. units Semiconductors, The Bipolar Transistor, The built-in Circuit, built-in NPN Transistors, The Case of the Lateral PNP Transistor, CMOS Transistors, The Substrate PNP Transistor, Diodes, Zener Diodes, Resistors, Capacitors, CMOS vs. Bipolar; 2. Simulation, DC research, AC research, brief research, adaptations, types, Diode version, Bipolar Transis-tor version, version for the Lateral PNP Transistor, MOS Transistor types, Resistor versions, versions for Capacitors; three. present Mirrors; four. Differential Pairs; five. present assets; 6. outing: Analog Measures, dB, RMS, Noise, Fourier research, Distortion, Frequency reimbursement; 7. Bandgap References; eight. Op Amps; nine. Comparators; 10. Transimpedance Amplifiers; eleven. Timers and Oscillators; 12. Phase-Locked Loops; thirteen. Filters; 14. strength, Linear Regulators, Low Drop-Out Regulators, Switching Regulators, Linear energy Amplifiers, Switching strength Am-plifiers; 15. A to D and D to A, The Delta-Sigma Converter; sixteen. Odds and Ends, Gilbert mobilephone, Multipliers, height Detectors, Rectifiers and Averaging Circuits, Thermometers, Zero-Crossing Detectors; 17. structure.
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Extra resources for Designing Analog Chips
Operating voltage (above the substrate potential) in excess of about 5 Volts. Thus, at any voltage higher than that, the epi-pinch resistor becomes a current source. The variation of this current is high (8:1), but you can create a small current (a few microamperes) in relatively little space. Capacitors The oxide insulating the metal interconnection from the silicon (or between metal layers) is dimensioned to give minimum stray capacitance. Even a small capacitor (say 5pF) would take up an enormous amount of space.
A signal of a particular frequency enters a deliberately non-linear block, such as a diode mixer or the phase-detector of a phase-locked loop. The non-linearity creates other frequencies (usually much lower ones, such as frequency differences), one of which we use and amplify. An AC noise analysis is useless here, because it cannot follow what happens to the noise as it is transformed by the mixer. What we need in such a case is a transient analysis program which pays attention to noise sources.
4%. 6% of all chips on a wafer. e. the design can withstand a variation of each and every device parameter to at least 3σ; 4σ would be better. But how do you find out how much parameter variation your design can take? The answer is Monte Carlo analysis, and only Monte Carlo analysis. There is in use what is called a "four-corner analysis". Device parameters are bundled together in four groups, representing extremes, or worst cases. The plain fact is this: it doesn't work for analog circuits. The four-corner models are just barely able to predict the fastest or slowest speed of digital ICs, but the grouping simply doesn't apply to analog ones.